CSE 141 Introduction to Computer Architecture

Lecture: TuTh 355-515pm, HSS 1330

Discussion Section: M1115-1205, Center 105

CSE141L Lecture: M615-705pm

CSE 141 Professor: Andrew A. Chien, achien@ucsd.edu, APM 4808 (Office Hours: after class on Tu, Th and by appointment)

CSE141 Teaching Assistants

CSE141L Professor: Dennis Bauman, bauman@spawar.navy.mil

Course Secretary: Lisa Bodecker, bodecker@cs.ucsd.edu, APM 3151

CSE 141 Web site: http://www-csag.ucsd.edu/teaching/cse141-w00/cse141.htm

CSE141L Web Site: http://www-cse.ucsd.edu/classes/wi00/cse141l_B/

Textbook: Computer Organization and Design: The Hardware and Software Interface, Patterson and Hennessy, Morgan-Kaufmann. (web supplementary materials behind this link)

Abstract

Introduction to basic concepts in computer architecture. The emphasis is performance metrics, dimensions of the design space, underlying design principles. Processor architecture (control, pipelining), memory architecture (caches), and I/O system design.

Course Newsgroup  (select CSE141 "Chien")

Prerequisites: Basic digital logic (CSE140 and 140L) and software programming.

Course Handouts

Course Information and Policies

Reading List

Homework Assignments

Homework Solutions

Lectures

                    Lecture 1: Introduction to CSE141  PDF

                    Lecture 2: Computer Architecture and Performance PDF

                    Lecture 3: Performance Metrics and Summaries  PDF

                    Lecture 4: Basic Machine Language  PDF

                    Lecture 5: Control Flow and Procedure Calls  PDF

                    Lecture 6: Procedure Call Examples and Instruction Set Comparisons  PDF

                    Lecture 7: Linking and Loading, Single Cycle CPU Datapath    PDF

                    Lecture 8: Control for the Single Cycle CPU Datapath    PDF

                    Lecture 9: Multiple Cycle CPU    PDF

                    Lecture 10: Control for the Multiple Cycle CPU    PDF

                    Lecture 11: Midterm Review    PDF

                    Midterm is on thursday 2/17, 355 - 515pm

                    Lecture 12: Pipelining Instructions (Datapath)    PDF

                    Lecture 13: Pipelining Instructions (Control)    PDF

                    Lecture 14: Advanced Pipelining    PDF

                    Lecture 15: Memory Hierarchies I    PDF

                    Lecture 16: Memory Hierarchies II    PDF

                    Lecture 17: Memory Hierarchies III, Virtual Memory    PDF

                    Lecture 18: Input/Output    PDF

                    Lecture 19: Course Review    PDF

                    TA Final Exam Review, Saturday March 18, 1-4pm Center Hall 113

                    Final Exam is on monday, 3/20, 3-6pm, Peterson Hall 110

Quizzes

Quiz #1 and Solutions

Quiz#2 and Solutions

Quiz#3 and Solutions

Quiz#4 and Solutions

Quiz#5 and Solutions

Midterm Solution

NOTE: There was some minor ambiguity in grading Problem #5, Part (a).
If you gave the answer "16 nanoseconds" (for Part (a) only),
and didn't receive any credit, please write a note to this
effect and submit your midterm to the TA's for correction on 
this question only.

Quiz#6 and Solutions

Quiz#7 and Solutions

 

For more information, email to Professor Andrew Chien

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