CS 433 Theory of High Speed Parallel Computation

Professor Andrew A. Chien 2215 DCL, x3-6844, achien@cs.uiuc.edu, Office Hours: TBD

Teaching Assistant: (none)

Course Secretary: Marla Brownfield , 2120 DCL, x4-6241, brownfld@cs.uiuc.edu

Credit: 1 unit, same as ECE 433;

Prerequisites: Consent of Instructor (Effectively CS 333 or equivalent); see Fall CS333 Course Material to assess this.

This course focuses on architectural issues in high performance computers, covering both software and hardware issues with the primary emphasis of hardware computer organization. The course will cover basics of parallel performance, classical parallel architectures, and contemporary machines with emphasis of design and evaluation techniques. Specific topics discussed include: classic machines such as vector machines, decoupled machines, symmetric multiprocessors, message passing machines, systolic architectures, data flow architectures; current designs such as distributed shared memory machines, clustered symmetric multiprocessors, and workstation clusters; as well as software issues such as and compiler and operating system support for such machines. The course focuses on developing an understanding of the critical issues and current state of the art in high performance computing. Course work will include hands on laboratories, homework assignments, several exams, and a significant semester project.

Lecture: WF 3:30 - 4:45pm, 103 Transportation Building

Textbook Information for the course is available.

Technical Paper readings for the course. Groups in the class.

Handouts:

Assignments:

Lecture Overheads:

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achien@cs.uiuc.edu