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\handedout{ (8/25/95) Handout \# 2}
\date{August 25, 1995}

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{\centering \Large \bf Preliminary Course Schedule}

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\begin{tabular}{|l|l|l|}
\hline
Topic                	& Dates      & Readings \\ \hline \hline
Overview, Technology, and  & 8/25,8/30,9/1       & H\&P, Ch. 1\\
Cost/Performance	   & 			 &  \\ \hline
Instruction Set Design 	   & 9/6, 9/8 		 & H\&P, Ch. 2 \\
Basic Inst. Exec. (Review) & 9/13		& \\ \hline
High Performance Techniques & 9/15, 9/20, 9/22, 9/27 & H\&P, Ch. 3, 4 \\  
(Pipelining, out-of-order, 	    & 9/29 & \\
memory ordering, SW issues) 	    & & \\
	%% pipelining,scoreboard,tomasulo's alg
Multiple Issue 		   & 10/4, 10/6 	& Papers \\ 
(superscalar, VLIW, SW issues) 	    & & \\ \hline
Catchup and Midterm Review & 10/11 & \\
Midterm 		   & 10/13 & Material to date \\ \hline \hline
Vector Machines 	   & 10/18, 10/20 	& H\&P, App. B \\ \hline
				%% M-to-M, Registers, chaining
Memory Hierarchies 	   & 10/25, 10/27, 11/1,11/3 & H\&P, Ch. 5 \\ 
(caches, multilevel caches,	 &  & \\
split, coherence, MP)		 &  & \\ \hline
Virtual Memory, Protection   & 11/8,11/10 & \\
and Sharing 	&  & \\ \hline
Input/Output & 11/15, 11/17, 11/22 & H\&P, Ch. 6 \\
(DMA,RAID's, gigabit networks)  &  & \\ \hline
System Interconnects	   & 11/29, 12/1 & H\&P, Ch.7 \\
High Performance Systems   & 12/6 & Papers \\ 
(a glimpse of the future)  &  & \\ \hline \hline
Course Review    & 12/8    & \\
{\it Final Exam} & 3 hours & Comprehensive \\ \hline
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Parts of Chapter 8 will also be covered in the second half of the course.

Of course, the schedule is subject to change.  Readings and
assignments will be announced and distributed in lectures.  The
readings indicated should be done in advance or concurrently with the
lectures on the same topics.

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%% Topical list

Introduction and survey, definition of computer architecture

Implementation technology: semiconductors, physical design of
	computers, real numbers and parameters

Cost and performance: measures, contributing factors, cost/performance
	tradeoffs 

Instruction set design: issues, motivating concerns, measurements of usage

Instruction execution: implementation techniques, pipelining, branch
and memory op optimization, multiple issue -- superscalar, vliw, etc.
Data path issues, floating point 

Vector Machines

Memory systems: virtual memory, segmentation, caches and tlb's

I/O: basic devices and characteristics, performance issues

System Interconnect: busses, Xbars, non-blocking networks,
interconnection networks.

High performance systems: case studies -- CRAY YMP, 
Sequent Symmetry, DASH, Touchstone Prototypes, Connection Machine,
etc. 


