Readings are on reserve at the DCL Library and at Grainger Library.

[1]	Amdahl, G.M., G.A. Blaauw, and F.P.Brooks, Jr. [1964].
	"Architecture of the IBM System 360," 
	IBM Journal of Research and Development 8:2 (April), 87-101.

[2]	Thornton, J.E. [1964].
	"Parallel Operation in the Control Data 6600,"
	Proc. Fall Joint Computer Conf. 26, 33-40.

[3]	Tomasulo, R.M. [1967].
	"An Efficient Algorithm for Exploiting Multiple Arithmetic Units,"
	IBM Journal of Research and Development 11:1 (January), 25-33.

[4]	Mosberger, David [1993].
	"Memory Consistency Models,"
	Operating Systems Review, 17(1):18-26, January 1993.
	Updated version.

[5]	Diep, T.A., C. Nelson, J.P.Shen [1995].
	"Performance Evaluation of the PowerPC 620 Microarchitecture,"
	Intl. Sym. Computer Architecture, 1995.
	(Copies of this paper were also distributed in class.)

[6]	Bekerman, Michael, and Avi Mendelson [1995].
	"A Performance Analysis of Pentium Processor Systems,"
	IEEE Micro, Oct. 1995.

[7]	Russell, R.M. [1978].
	"The CRAY-1 Processor System,"
	Comm. of the ACM 21:1 (January), 63-72.

[8]	Smith, A.J. [1982].
	"Cache Memories,"
	Computing Surveys 14:3 (September), 473-530.
	This paper is recommended but not required reading.